| 2011 |
High-level Synthesis of In-Circuit Assertions for Verification, Debugging, and Timing Analysis |
J. Curreri, G. Stitt, and A. George |
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| 2011 |
Spectral Method Characterization on FPGA and GPU Accelerators |
K. Pereira, P. Athanas, H. Lin, W. Feng |
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| 2011 |
Intermediate Fabrics: Virtual Architectures for Near-Instant FPGA Compilation |
Greg Stitt, James Coole |
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| 2011 |
Reduced-Precision Redundancy on FPGAs |
B. Pratt, M. Fuller, and M. Wirthlin |
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| 2011 |
Communication Visualization for Bottleneck Detection of High-Level Synthesis Applications |
J. Curreri, G. Stitt, and A. George |
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| 2010 |
Synchronization Voter Insertion Algorithms for FPGA Designs Using Triple Modular Redundancy |
J. M. Johnson |
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| 2010 |
Integrating Application Specification and Performance Prediction for Strategic Design-Space Exploration |
B. Holland, A. George, and H. Lam |
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| 2010 |
DAPR: Design Automation for Partially Reconfigurable FPGAs |
S. Yousuf and A. Gordon-Ross |
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| 2010 |
Reliable Communications Using FPGAs in High-Radiation Environments - Part I: Characterization |
B. Pratt, M. Fuller, M. Rice, and M. Wirthlin |
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| 2010 |
Performance Visualization and Exploration for Reconfigurable Computing Applications |
S. Koehler and A. George |
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| 2010 |
Space and Time Sharing of Reconfigurable Hardware for Accelerated Parallel Processing |
E. El-Araby, V. Narayana, and T. El-Ghazawi |
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| 2010 |
VAPRES: A Virtual Architecture for Partially Reconfigurable Embedded Systems |
A. Jara-Berrocal and A. Gordon-Ross |
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| 2010 |
A Comparison of Fault-Tolerant Memories in SRAM-Based FPGAs |
N. Rollins, M. Fuller, and M. Wirthlin |
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| 2010 |
Rapid Prototyping Tools for FPGA Designs: RapidSmith |
C. Lavin, M. Padilla, J. Lamprecht, P. Lundrigan, B. Nelson, and B. Hutchings |
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| 2010 |
Using Statistical Models with Duplication and Compare for Reduced Cost FPGA Reliability |
J. Anderson, B. Nelson, and M. Wirthlin |
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| 2010 |
A Parallel Hardware Architecture for Information-Theoretic Adaptive Filtering |
S. Craciun, A. George, H. Lam, and J. Principe |
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| 2010 |
Voter Insertion Algorithms for FPGA Designs Using Triple Modular Redundancy |
J. Johnson and M. Wirthlin |
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| 2010 |
Comparative Analysis of HPC and Accelerator Devices: Computation, Memory, I/O, and Power |
J. Richardson, S. Fingulin, D. Raghunathan, C. Massie, A. George, and H. Lam |
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| 2010 |
Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing |
J. Curreri, S. Koehler, A. George, B. Holland, and R. Garcia |
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| 2010 |
Reconfiguration and Communication-Aware Task Scheduling for High-Performance Reconfigurable Computing |
M. Huang, V. K. Narayana, H. Simmler, O. Serres, and T. El-Ghazawi |
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| 2010 |
Accelerating Electrostatic Surface Potential Calculation with Multiscale Approximation on Graphics Processing Units |
R. Anandakrishnan, T. Scogland, A. Fenley, J. Gordon, W. Feng, and A. Onufriev |
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| 2010 |
High-Level Synthesis Techniques for In-Circuit Assertion-Based Verification |
J. Curreri, G. Stitt, and A. George |
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| 2010 |
Synchronization Techniques for Crossing Multiple Clock Domains in FPGA-Based TMR Circuits |
Y. Li, B. Nelson, M. Wirthlin |
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| 2010 |
Characterization of Fixed and Reconfigurable Multi-Core Devices for Application Acceleration |
J. Williams, A. George, J. Richardson, K. Gosrani, C. Massie, and H. Lam |
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| 2010 |
A Simulation Framework for Rapid Analysis of Reconfigurable Computing Systems |
C. Reardon, E. Grobelny, A. George, and G. Wang |
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| 2010 |
Virtual Architectures for Circuit Portability and Fast Placement and Routing |
J. Coole and G. Stitt |
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| 2010 |
On The Use of Rapid Prototyping for Designing PCM/FM Demodulators in FPGAs |
M. Rice, B. Nelson, M. Padilla, and J. Havican |
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| 2010 |
Performance Modeling for Multilevel Communication in SHMEM+ |
V. Aggarwal, C. Yoon, A. George, H. Lam, and G. Stitt |
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| 2010 |
A First Look at Integrated GPUs for Green High-Performance Computing, |
T. Scogland, H. Lin, and W. Feng |
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| 2010 |
Increasing Design Productivity Through Core Reuse, Meta-Data Encapsulation, and Synthesis |
A. Arnesen, K. Ellsworth, D. Gibelyou, T. Haroldsen, J. Havican, M. Padilla, B. Nelson, M. Rice, and M. Wirthlin |
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| 2010 |
Using Hard Macros to Reduce FPGA Compilation Time |
C. Lavin, M. Padilla, S. Ghosh, B. Nelson, B. Hutchings, and M. Wirthlin |
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| 2010 |
Reconfigurable Supercomputing with Scalable Systolic Arrays and In-Stream Control for Wavefront Genomics Processing |
C. Pascoe, A. Lawande, H. Lam, A. George, Y. Sun, W. Farmerie, and M. Herbordt |
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| 2010 |
An Automated Scheduling and Partitioning Algorithm for Scalable RC Systems, |
C. Reardon, A. George, G. Stitt, and H. Lam |
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| 2010 |
Reliable Communications Using FPGAs in High-Radiation Environments - Part 1: Characterization |
B. Pratt, M. Fuller, M. Rice, M. Wirthlin |
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| 2010 |
Acceleration of FPGA Fault Injection through Multi-Bit Testing |
G. Cieslewski, A. George, and A. Jacobs |
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| 2009 |
Run-Time FPGA Partial Reconfiguration for Image Processing Applications |
S. Yousuf and A. Gordon-Ross |
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| 2009 |
Fault-Tolerant Block-RAM Memories in SRAM-Based FPGAs |
N. Rollins and M. Wirthlin |
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| 2009 |
Reduced Cost Reliability via Statistical Model Detection |
J. Anderson, B. Nelson, and M. Wirthlin, |
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| 2009 |
Synchronization Issues of TMR Crossing Multiple Clock Domains |
Y. Li, B. Nelson, and M. Wirthlin |
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| 2009 |
On FM Demodulators in Software-Defined Radios Using FPGAs |
M. Rice, M. Padilla, B. Nelson |
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| 2009 |
Reconfigurable Fault Tolerance: A Framework for Environmentally Adaptive Fault Mitigation in Space |
A. Jacobs, A. George, and G. Cieslewski |
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| 2009 |
A Multi-Layered XML Schema and Design Tool for Reusing and Integrating FPGA IP |
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| 2009 |
Noise Impact of Single-Event Upsets on an FPGA-Based Digital Filter |
B. H. Pratt, M. Wirthlin, M. Caffrey, P. Graham, K. Morgan |
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| 2009 |
MACS: A Minimal Adaptive Routing Circuit-Switched Architecture for Scalable and Parametric NoCs |
R. Kumar and A. Gordon-Ross |
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| 2009 |
Space Applications on Tilera," Workshop for Multicore Processors For Space - Opportunities and Challenges |
J. Richardson, C. Massie, H. Lam, K. Gosrani, and A. George |
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| 2009 |
Runtime Temporal Partitioning Assembly to Reduce FPGA Reconfiguration Time |
A. Jara-Berrocal and A. Gordon-Ross |
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| 2009 |
Adaptive Software-based Fault Tolerance for Space Multicore Processing |
A. Jacobs, G. Cieslewski, and A. George |
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| 2009 |
SCF: A Device- and Language-Independent Task Coordination Framework for Reconfigurable, Heterogeneous Systems |
V. Aggarwal, R. Garcia, G. Stitt, A. George, and H. Lam |
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| 2009 |
RAT: RC Amenability Test for Rapid Performance Prediction |
B. Holland, K. Nagarajan, and A. George |
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| 2009 |
A Framework for Core-level Modeling and Design of Reconfigurable Computing Algorithms |
G. Wang, G. Stitt, H. Lam, and A. George |
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