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A High-Level Synthesis Scheduling and Binding Heuristic for FPGA Fault Tolerance

Year
2017
Authors
D. Wilson, A. Shastri, and G. Stitt.
Conference/Journal Information
International Journal of Reconfigurable Computing, vol. 2017, Article ID 5419767, p. 17
Date
Aug. 21, 2017
DOI/Conference Number
https://doi.org/10.1155/2017/5419767